发明名称 Domino logic testing systems and methods
摘要 A domino logic test circuit includes a dynamic node, a precharge device for charging the dynamic node, and an output inverter for inverting an output of the dynamic node. A logic network is coupled to the dynamic node for discharging the dynamic node in accordance with logic. A footer device enables and disables the logic network. A keeper device is coupled to the dynamic node for retaining a charge state of the dynamic node while awaiting the logic network to operate in accordance with the logic. A test mode selection device is coupled to the dynamic node and is configured to enable a latch in the test mode. A phase selection device is configured to receive at least a wait signal and to enable selection of at least a precharge phase for charging the dynamic node to a voltage level, a write phase for generating a value to the latch based on the logic and the voltage level of the dynamic node, and a wait phase for enabling reading the value. The selection is based, at least partially, on the wait signal state.
申请公布号 US7332938(B2) 申请公布日期 2008.02.19
申请号 US20060426278 申请日期 2006.06.23
申请人 THE CURATORS OF THE UNIVERSITY OF MISSOURI 发明人 AL-ASSADI WALEED K.;CHANDRASEKHAR PAVANKUMAR
分类号 H03K19/096 主分类号 H03K19/096
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