发明名称 Nonlinear distortion compensating circuit
摘要 A nonlinear distortion compensating circuit in which a digital value expressing the amplitude of an input signal is divided into upper and lower bits. Only the upper bits are input to a first memory address. A value obtained by adding 1 to the upper bits is input to a second memory address, or, an interpolation circuit to which the upper bits are input, inputs the upper bits to a first memory storing data corresponding to an even numbered address and a second memory storing data corresponding to an odd numbered address, and performs interpolation by adding outputs from the memories by weighting these outputs in accordance with a value expressed by the lower bits. The input signal is multiplied by the obtained value. An interpolation circuit output is an orthogonal coordinate expression (combination of a real part and imaginary part) or polar coordinate expression (combination of an amplitude and phase).
申请公布号 US7333562(B2) 申请公布日期 2008.02.19
申请号 US20030607149 申请日期 2003.06.27
申请人 NEC CORPORATION 发明人 IWASAKI MOTOYA
分类号 H04K1/02;H03F1/32 主分类号 H04K1/02
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