发明名称 METHOD AND STRUCTURE TO USE AN ETCH RESISTANT LINER ON TRANSISTOR GATE STRUCTURE TO ACHIEVE HIGH DEVICE PERFORMANCE
摘要 A semiconductor device. The semiconductor device includes a substrate includes: a substrate having a first gate stack on a surface of the substrate, wherein the first gate stack has a top surface parallel to the surface of the substrate and sidewalls perpendicular to the surface of the substrate; an etch resistant first liner over the sidewalls of the first gate stack and not over the top surface of the first gate stack; a first outer spacer over the first liner, wherein the first liner is disposed between the first outer spacer and the sidewalls of the first gate stack, and wherein a portion of the first liner covers a first portion of the surface of the substrate; an insulative layer on a second portion of the surface of the substrate; and a conductive layer on the top surface of the first gate stack.
申请公布号 US2008036017(A1) 申请公布日期 2008.02.14
申请号 US20070836193 申请日期 2007.08.09
申请人 发明人 NG HUNG Y.;YANG HAINING S.
分类号 H01L31/00 主分类号 H01L31/00
代理机构 代理人
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