| 摘要 |
A refresh circuit of a semiconductor memory apparatus is provided to generate at least one refresh signal by one external command indicating to perform refresh operation. A command decoder(10) outputs a refresh pulse by receiving an external command. A refresh flag signal generation unit(300) generates a refresh flag signal in response to the refresh pulse and a bank address signal. The bank address signal is a control signal. A refresh signal generation unit(20) generates a refresh signal by receiving the refresh flag signal.
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