| 摘要 |
<p>A method for manufacturing a gate of a nonvolatile memory device is provided to improve a cell distribution and to minimize generation of particles by using one etchant having a low etch selectivity. A stacked material layer made of multiple insulating layers and conductive layers is formed on an upper portion of a semiconductor substrate(100). The stacked material layer is comprised of a silicon oxide layer(102), a first polysilicon layer(104), an ONO(Oxide-Nitride-Oxide) layer(106), a second polysilicon layer(108), and a tungsten silicide layer(110). The stacked material layer is etched only one time by using an etchant to have an anisotropic characteristic. The etchant is comprised of a certain mixture ratio of CF4, He, and HBr having a low etch selectivity between the insulating layers and the conductive layers. A hard mask layer made of a stacked structure of nitride-oxide-nitride is deposited on an upper portion of the stacked material layer.</p> |
