PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE (FPGA) AND A METHOD FOR PROGRAMMING AND TESTING AN ANTIFUSE FPGA

摘要

The present invention comprises apparatus and a method for simultaneously programming multiple antifuses in a multiple tile field programmable gate array (FPGA). The invention comprises an FPGA having a plurality of logic modules with programmable elements. The logic modules are partitioned into a plurality of individually programmable groups and an isolation device may be coupled between the individually programmable groups of logic modules such that each of the programmable elements in each of the plurality of individually programmable logic modules may be programmed concurrently.