发明名称 Memory protection apparatus
摘要 Memory protection apparatus to protect memory area to realize high interruption response and prohibit from access to the memory area that is previously designated. The memory area data registers 132 ( 1 ) to (m), respectively, retain data which designate the accessible memory area in the processing corresponding to interruption of the group number corresponding to it. Selection circuit 133 selects any of the memory area data registers 132 ( 1 ) to (m) according to the group number retained by the group number register 131 , and outputs data that designates selected memory area retained by the memory area data registers 132 . Address bus watching part 106 watches generation of illegal memory access of the processor according to the data designating the memory area output by the selection circuit 133.
申请公布号 US7325113(B2) 申请公布日期 2008.01.29
申请号 US20050086762 申请日期 2005.03.23
申请人 NEC ELECTRONICS CORPORATION 发明人 MATSUYAMA HIDEKI
分类号 G06F12/00;G06F12/14 主分类号 G06F12/00
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