发明名称 Low complexity block size decision for variable block size motion estimation
摘要 An apparatus generally having a first circuit and a second circuit for motion estimation is disclosed. The first circuit may be configured to (i) generate a first motion vector for a block at an integer-pel resolution and (ii) determine a single block size associated with the first motion vector. The second circuit may be configured to (i) generate a plurality of second motion vectors at a sub-pel resolution by searching proximate the first motion vector using the single block size and (ii) determine a motion vector for the block as a particular one of the second motion vectors best matching a plurality of reference samples.
申请公布号 US7324596(B2) 申请公布日期 2008.01.29
申请号 US20030690884 申请日期 2003.10.22
申请人 LSI LOGIC CORPORATION 发明人 GALLANT MICHAEL D.;PEARSON ERIC C.
分类号 H04B1/66;H04N5/14;H04N7/12;H04N7/26;H04N11/04 主分类号 H04B1/66
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