发明名称 MEMORY DEVICE AND MEMORY READ ERROR DETECTION METHOD
摘要 PROBLEM TO BE SOLVED: To provide a memory device which has resistance to an error in general such as a timing error and a software error, and is guaranteed in reading a cell value correctly, and a memory read error detection method. SOLUTION: The memory device is equipped with one or a plurality of memory cells (CL) arranged over rows and columns; a word line prepared in each row (WD); a complimentary bit line pair (BL1, BL2) comprising mutually-complementary first second bit lines prepared in each column; and a matching comparison circuit (CM) which carries out the matching comparison of the output of the complimentary bit line pair. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008016163(A) 申请公布日期 2008.01.24
申请号 JP20060189029 申请日期 2006.07.10
申请人 UNIV OF TOKYO;JAPAN SCIENCE & TECHNOLOGY AGENCY 发明人 IRIE HIDETSUGU;GOSHIMA MASAHIRO;SAKAI SHUICHI
分类号 G11C11/413 主分类号 G11C11/413
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