摘要 |
PROBLEM TO BE SOLVED: To provide an inexpensive RC calibration circuit in which a calibration time is short. SOLUTION: This RC calibration circuit generates a frequency-division signal VIN by dividing frequency of a reference clock signal RefCLK into two, and charges a capacitor by responding to the rising edge of the frequency-division signal VIN, and when the inter-terminal voltage VOUT of the capacitor exceeds a reference voltage Vref, count values C1 to CN are increased or decreased according to the level of the reference clock signal RefCLK, and controls the time constant of the RC filter circuit and an RC reference circuit 3 according to the count values C1 to CN. Therefore, it is not necessary to provide any conventional delay unit 75 or latch circuit 76. COPYRIGHT: (C)2008,JPO&INPIT
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