| 摘要 |
<p>An analogue to digital converter (ADC) comprises a digital ramp generator (700, an analogue voltage comparator (106), a digital to analogue converter (DAC) (110) and a data storage device (108).
The digital ramp generator (700) comprises first and second counters (704, 706). An output (714) of the first counter (704) outputs an incremental code (INC) to an input (720) of the second counter (706) such that the output code (RAMP) of the second counter (706) varies by said incremental code (INC). The second counter (706) outputs a digital ramp code (RAMP) to respective inputs of the DAC (110) and the data storage device (108). The DAC (110) outputs an analogue voltage to an input of the analogue voltage comparator (106)which switches logic states when the output analogue voltage of the DAC (110) equals an input voltage received at its second. The data storage device (108) stores a code of the digital ramp code (RAMP) received at the data storage device (108) at the switching of the logic state of the analogue voltage comparator (106). The first counter (702) varies the incremental code (INC) by an incremental step (INC_STEP) in response to a clock signal.</p> |
