发明名称 A quadrature demodulator employing timing recovery interpolator
摘要 <p>An apparatus for quadrature demodulating a modulated signal includes a front processor (11-13) for outputting a digital formatted base band signal, an interpolation processor (15a,15b) containing a FIR filter (21) for adjusting a phase error in accordance with sampling timing on the basis of the base band signal output from the front processor (11-13) and for creating and outputting a base band signal synchronized with the sampling timing, and a back processor (17a,17b) for wave-shaping the base band signal output from the interpolation processor (15a,15b). The apparatus changes tap coefficients Ci supplied to the FIR filter (21) in the interpolation processor according to a control information, and thus appropriately control the bandwidth characteristic of the interpolation processor. The control information can be the reception rate of the digital base band signal, or the multi-value information relating to the quadrature amplitude modulation, or the difference between input and output signal strengths of the interpolation processor (15a,15b), or remaining error after the demodulation. </p>
申请公布号 EP1689112(A3) 申请公布日期 2008.01.23
申请号 EP20060250617 申请日期 2006.02.03
申请人 FUJITSU LIMITED 发明人 OISHI, SYOUJI;IWAMATSU, TAKANORI
分类号 H04L7/02;H04L27/38 主分类号 H04L7/02
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