| 摘要 |
A shift register is provided, which includes: a plurality of stages sequentially outputting gate signals, each stage including: an input unit outputting a control signal based on an external signal; an output unit connected to the input unit and outputting a gate signal based on a first clock signal and the control signal; and a signal generating unit connected to the output unit and generating a transmission signal based on the first clock signal and the control signal.
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