SEMICONDUCTOR DEVICE HAVING A SALICIDE LAYER AND METHOD OF FABRICATING THE SAME

摘要

A semiconductor device having a salicide layer and a method for fabricating the same are provided to lower the electrical resistance of a wiring by patching a disconnected part of the salicide layer with a metal or a metal silicide. An active region(51) is defined on a semiconductor substrate. A gate electrode crosses an upper surface of the active region. A plurality of spacer patterns(54) are formed on both sidewalls of the gate electrode. A gate salicide layer(56g) is formed on an upper surface of the gate electrode and is partially disconnected. Source/drain salicide layers(56s,56d) are formed on the active region of both sides of the gate electrode. A conductive patch layer(60) is formed on the gate electrode of the disconnected part of the gate salicide layer. The conductive patch layer is plated by using an electroless-plating method. The conductive patch layer is electrically connected to the gate salicide layer.