| 摘要 |
A method for manufacturing a semiconductor device is provided to reduce bit line capacitance by forming a sidewall protection layer of a bit line pattern with an oxide layer having a dielectric constant lower than a dielectric constant of a nitride layer. A conductive pattern is formed on an upper surface of a semiconductor substrate(31). An insulating layer is formed on the conductive pattern. The insulating layer has a dielectric constant lower than a dielectric constant of a nitride layer for filling a gap between the conductive patterns. A hard mask having a width larger than the width of the conductive pattern is formed on the insulating layer. A sidewall protection layer(38B) and a contact hole(41) are formed on a sidewall of the conductive pattern by etching the insulating layer. A contact plug is formed by burying a conductive material into the contact hole.
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