发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 A semiconductor memory device is provided to perform more reliable delay lock operation, by using an input signal, in outputting a finally delay locked clock signal as obtaining equal duty ratio using output signals of a first delay locked loop and a second delay locked loop. A first delay locked loop circuit(200) outputs a first delay locked clock locking the delay of a clock signal by comparing phase of a first reference signal with phase of the clock signal. A second delay locked loop circuit(300) outputs a second delay locked clock for locking the delay of an inverted signal of the clock signal by comparing phase of the inverted signal of the clock signal with phase of a second reference signal. A duty circuit part(400) outputs a third delay locked clock with fixed duty ratio by using the first delay locked clock and the second delay locked clock. The first reference signal is generated by using the first delay locked clock, and the second reference signal is generated by using the second delay locked clock.
申请公布号 KR20080001124(A) 申请公布日期 2008.01.03
申请号 KR20060059256 申请日期 2006.06.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOU, MIN YOUNG
分类号 G11C8/00 主分类号 G11C8/00
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