Four-gate transistor analog multiplier circuit

摘要

A differential output analog multiplier circuit utilizing four G⁴-FETs, each source connected to a current source. The four G⁴-FETs may be grouped into two pairs of two G⁴-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G⁴-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.