Correction method and correction system for design data or mask data, validation method and validation system for design data or mask data, yield estimation method for semiconductor integrated circuit, method for imporving design rule, mask production method, and semiconductor integrated circuit production method

摘要

The subject invention provides a correction method for design data or mask data comprising the steps of: (i) carrying out PPC of design data or mask data; (ii) exposing and developing a resist with an evaluation mask including a critical pattern which becomes critical in a process, etching a circuit material using the resist having been developed, and measuring pattern sizes of the developed resist and the etched circuit material; (iii) extracting parameter numerical condition for preventing the design data or the mask data from being critical after OPC or PPC, as a rule or as a model based on the pattern sizes of the resist and the circuit material; (iv) extracting a critical pattern with a parameter not satisfying the foregoing rule or the model from the design data or the mask data; and (v) correcting the critical pattern. With this method, the present invention provides such as a validation/correction method for design data or mask data by which a pattern which becomes critical in a process is extracted in advance so that the pattern can be corrected. Consequently, the process spec is achieved in a short period of time after OPC or process proximity effect correction (PPC).