发明名称 METHOD OF FORMING A METAL INTERCONNECTION FILLING A RECESSED REGION USING AN ELECTRO-PLATING TECHNIQUE
摘要 A method of forming a metal wiring for filling a recessed region using an electro-plating method is provided to suppress a terminal effect of a main metal layer by preventing generation of voids in a metal layer and increasing a thickness of a metal seed layer. An insulating layer is formed on a semiconductor substrate(21). A recessed region is formed by patterning the insulating layer(23). A metal seed layer is formed on an inner wall of the recessed region and an upper surface of the insulating layer(25). The semiconductor substrate having the metal seed layer is dipped into an electrolyte. Overhangs of the metal seed layer for covering protrusive corners of the recessed region are selectively removed by applying electro-polishing current from the metal seed layer to the electrolyte(27). A main metal layer for filling the recessed region is formed on the electro-polished metal seed layer by using an electro-plating technique(29).
申请公布号 KR100791078(B1) 申请公布日期 2008.01.02
申请号 KR20060092864 申请日期 2006.09.25
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 OH, JUN HWAN;KIM, HYOUNG SIK;CHUNG, JU HYUCK;KIM, IL GOO
分类号 H01L21/288 主分类号 H01L21/288
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