OVERLAY VERNIER KEY AND METHOD FOR FORMING CONTACT HOLE OF SEMICONDUCTOR DEVICE BY USING THE SAME

摘要

An overlay vernier key is provided to precisely measure an overlay degree by avoiding an optical path difference caused by aberration of exposure equipment. An outer pattern(100) is formed as a reference of overlay measurement in any one layer on a semiconductor substrate. Vernier patterns(101,201) are clustered in an inner pattern(200), having the same line width and pitch as a contact hole pattern that is formed in another layer on the semiconductor substrate to construct a circuit. The contact hole pattern can be made of a minimum design rule size for circuit construction so that the vernier pattern has a minimum design rule size.