发明名称 |
VARIABLE LENGTH DECODING DEVICE, VARIABLE LENGTH DECODING METHOD AND IMAGING SYSTEM |
摘要 |
<P>PROBLEM TO BE SOLVED: To attain reduction of a read processing time by reading a level from a data buffer based on addresses in an address holder. <P>SOLUTION: In a variable length decoding device, a variable length decoder 3 sequentially decodes variable length coded run length data into Total Coeff, level, total-zeros and run-before. A write controller 8 writes the level to a first data buffer in decoded order. An initial address calculator 5 calculates the initial address of the level from the Total Coeff and the number of zero coefficients of the total-zeros. An address holder holds the address of the level corresponding to data based on the initial address and the number of zero coefficients by the run-before. A read controller 9 reads the level from the first data buffer based on the address information. A selector 10 selects the data of either the level or the zero coefficients based on the address information. <P>COPYRIGHT: (C)2008,JPO&INPIT |
申请公布号 |
JP2007329903(A) |
申请公布日期 |
2007.12.20 |
申请号 |
JP20070116889 |
申请日期 |
2007.04.26 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
NAGATA TAICHI;KITAMURA SHINJI |
分类号 |
H03M7/40;H03M7/46;H04N1/419;H04N19/00;H04N19/196;H04N19/423;H04N19/44;H04N19/91;H04N19/93 |
主分类号 |
H03M7/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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