| 摘要 |
Disclosed herein is a multiplexing circuit for decreasing the output delay time of an output signal. The multiplexing circuit includes multiplexing units and a multiplexing output unit. Each multiplexing unit is initialized in response to an initialization signal, and outputs an input signal as a selection output signal in response to a selection control signal. The multiplexing output unit performs a logic operation on selection output signals received from the multiplexing units and outputs a multiplexing output signal based on the results of this operation. Preferably, the initialization signal is shared by two of the multiplexing units, and the initialization signal which is input to one of the two multiplexing units is the selection control signal which in input to the other of the two multiplexing units.
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