发明名称 Method and apparatus for checking read errors with two cyclic redundancy check stages
摘要 A system for detecting errors in received input data includes a first error detection circuit. The first error detection circuit is configured to receive the input data. The input data includes at least one of data and data with errors. The first error detection circuit is configured to generate a first error detection sequence in a first order. The system includes a second error detection circuit. The second error detection circuit is configured to receive the first error detection sequence and an error sequence. The error sequence is received in a second order that is different from the first order when there is data with errors. The second error detection circuit is configured to generate a second error detection sequence that indicates whether the error sequence is generated correctly.
申请公布号 US7310765(B1) 申请公布日期 2007.12.18
申请号 US20050049753 申请日期 2005.02.04
申请人 MARVELL INTERNATIONAL LTD. 发明人 FENG WEISHI;ZHANG LIANG;YU ZHAN
分类号 H03M13/23;H03M13/09;H03M13/29 主分类号 H03M13/23
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