发明名称 DATA ANALYSIS METHOD FOR INTEGRATED CIRCUIT PROCESS AND SEMICONDUCTOR PROCESS
摘要 A data analysis method for an integrated circuit process is described, for analyzing the results of at least an in-line quality test, a product test and a yield test done to the products of the IC process. The products are divided into a normal group and an abnormal group based on the result of the in-line quality test, and are divided into a qualified group and an unqualified group based on the result of the yield test. A categorization step is performed to define the intersection of the unqualified group and the normal group as a first problematic group and to define the intersection of the unqualified group and the abnormal group as a second problematic group. By analyzing one or both of the two problematic groups, the major yield killer can be identified so that process modification can be made accordingly to improve the yield.
申请公布号 US2007282544(A1) 申请公布日期 2007.12.06
申请号 US20060308986 申请日期 2006.06.02
申请人 ZHANG GUOHAI;LEE KAY-MING;DU LU-YING;KUO JUI-CHUN 发明人 ZHANG GUOHAI;LEE KAY-MING;DU LU-YING;KUO JUI-CHUN
分类号 G06F19/00 主分类号 G06F19/00
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