| 摘要 |
A duty cycle correction circuit is provided to improve duty cycle correction capability, by mixing phases according to the amount of duty distortion by detecting the duty distortion of two input clock signals in advance. A duty cycle correction circuit mixes phases of a first clock signal and a second clock signal delayed and locked through a delay locked loop circuit, and corrects duty by mixing the mixed clock with a selected clock signal selected from the first clock signal and the second clock signal. The duty cycle correction circuit includes a mixing control part(300) outputting a number of control signals to give a weight value to the selected clock signal according to a digital code obtained by digitalizing the duty difference between the first and the second clock signal. The mixing control part includes a phase detection part, a charge pump part, a conversion part and a decoder part. |
