发明名称 Method of tiling analog circuits
摘要 The present invention provides a method for tiling an integrated circuit having a critically matched device such as a transistor. The method obtains an advantage of automatically improving metallic density over critically matched devices thus yielding improved CMP. The method may include the steps of: identifying critically matched devices in the integrated circuit; placing metal tiles over the critically matched device; performing a density test around each critically matched device; and if a density test is not satisfied around a critically matched device, placing at least one metal strip over a critically matched device.
申请公布号 US7305642(B2) 申请公布日期 2007.12.04
申请号 US20050100039 申请日期 2005.04.05
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 MCCLELLAN JAMES F.;DRENNAN PATRICK G.;GARRITY DOUGLAS A.;LOCASCIO DAVID R.;MCGOWAN MICHAEL J.
分类号 G06F17/50;G06F19/00 主分类号 G06F17/50
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