发明名称 DISCHARGE ORDER CONTROL CIRCUIT AND MEMORY DEVICE
摘要 A discharge order control circuit includes a pool circuit, a delay circuit and a discharge unit to control a discharge order of internal power supplies. The pool circuit stores electric charges provided from a potential of an external power supply. The delay circuit operates on the electric charges stored in the pool circuit and delays a discharge signal generated when potential of the external power supply is lowered to a predetermined potential level. The delay circuit includes an inverter array having a plurality of stages each containing an inverter. The plurality of stages include a final stage that outputs the delayed discharge signal. Only the inverter of the final stage generates an RC delay. The discharge unit discharges a internal power supply included in the internal power supplies in response to the delayed discharge signal output from the inverter of the final stage of the inverter array.
申请公布号 US2007274132(A1) 申请公布日期 2007.11.29
申请号 US20070671107 申请日期 2007.02.05
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OGIWARA RYU;SHIRATAKE SHINICHIRO;TAKASHIMA DAISABURO
分类号 G11C11/22;G11C11/34 主分类号 G11C11/22
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