| 摘要 |
<p>A flash memory cell is provided to improve an interference characteristic by increasing an interval between adjacent floating gates. A field oxide layer(45) is formed in a substrate(40) in a manner that a part of the field oxide layer protrudes to the surface of the substrate. A tunnel oxide layer(41) is formed on the substrate exposed to both sides of the field oxide layer. A floating gate(42b) is formed on the tunnel oxide layer, electrically separated by the field oxide layer. Both sides of the floating gate from a position separated from the tunnel oxide layer by a predetermined distance to its top portion are recessed by a predetermined width. The top portion and the recessed both sides of the floating gate are interconnected by an inclined surface with a predetermined inclined angle. A dielectric layer(49) is formed along a step of the upper portion of the field oxide layer including the floating gate. A control gate(50) is formed along a step of the upper portion of the dielectric layer. The floating gate from the upper surface of the tunnel oxide layer to a position separated from the tunnel oxide layer by a predetermined distance can have the same width as the tunnel oxide layer.</p> |
