| 摘要 |
<P>PROBLEM TO BE SOLVED: To appropriately adjust the phase of a data strobe signal DQS according to the switching of an operation clock of DDR/DDR1/LPDDR or SDRAM. <P>SOLUTION: A memory controller is equipped with a plurality of DLLs with different operating frequency ranges, and is capable of handling a wide operation clock range of the SDRAM by switching operating frequency ranges using DLLs selectively for each operating frequency. The memory controller is also equipped with one or more DLs in addition to the DLLs, and has a mode in which phase adjustment is carried out using the DL, and a mode in which phase adjustment is carried out using the DLL. When the SDRAM is used in low-speed operation, the operation is performed in the DL mode without using the DLL, thereby reducing power consumption. <P>COPYRIGHT: (C)2008,JPO&INPIT |
