| 摘要 |
PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device and its manufacturing method capable of enough suppressing misalignment between a wiring layer and a via. SOLUTION: The method comprises a step of forming a first wiring layer 102 on a first interlayer insulating layer 101, forming a second interlayer insulating layer 104 on the first wiring layer 102, removing by etching the second interlayer insulating layer 104 to expose the first wiring layer 102, removing by etching the first wiring layer 102 taking the second interlayer insulating layer 104 as a mask to expose the first interlayer insulating layer 101, forming a third interlayer insulating layer 105 having an etching selection ratio to the second interlayer insulating layer 104 on the first and second interlayer insulating layers 101, 104, removing by polishing the third interlayer insulating layer 105 to expose the second interlayer insulating layer 104, forming a mask layer 108 having an opening 109 on the second and third interlayer insulating layers 104, 105, and removing the second interlayer insulating layer 104 located below the opening 109 to form a via hole 110 on the first wiring layer 102. COPYRIGHT: (C)2008,JPO&INPIT
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