发明名称 APPARATUS AND METHOD FOR CLOCK SIGNAL GENERATION
摘要 <P>PROBLEM TO BE SOLVED: To provide an apparatus and a method for clock signal generation which can generate clock signals for main data reproduction at an accurate frequency in a receiver side, even if burst delays or arrival order inversion occurs in packets transmitted through a network. <P>SOLUTION: A timestamp of a received packet which has a specified sequence number is extracted from received packets as a transmission timestamp, and a timestamp which indicates the receiving time of a received packet that is synchronized with a clock signal, and has a specified sequence number is generated as a receiving timestamp. Then, the frequency of a clock signal is adjusted so that the time intervals between transmission timestamps match to time intervals between receiving timestamps. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007282093(A) 申请公布日期 2007.10.25
申请号 JP20060108715 申请日期 2006.04.11
申请人 OKI ELECTRIC IND CO LTD;OKI COMTEC LTD 发明人 TERAYAMA TOMOYUKI
分类号 H04L7/02;H04L7/00 主分类号 H04L7/02
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