发明名称 Nonvolatile memory cell comprising a reduced height vertical diode
摘要 A nonvolatile memory cell according to the present invention comprises a bottom conductor, a semiconductor pillar, and a top conductor. The semiconductor pillar comprises a junction diode, including a bottom heavily doped region, a middle intrinsic or lightly doped region, and a top heavily doped region, wherein the conductivity types of the top and bottom heavily doped region are opposite. The junction diode is vertically oriented and is of reduced height, between about 500 angstroms and about 3500 angstroms. A monolithic three dimensional memory array of such cells can be formed comprising multiple memory levels, the levels monolithically formed above one another.
申请公布号 US7285464(B2) 申请公布日期 2007.10.23
申请号 US20040015824 申请日期 2004.12.17
申请人 SANDISK 3D LLC 发明人 HERNER S. BRAD;RADIGAN STEVEN J.
分类号 H01L21/336;G11C7/00;G11C11/39;G11C17/06;G11C17/16;G11C29/00;H01L21/82;H01L27/24;H01L29/73;H01L45/00 主分类号 H01L21/336
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