| 发明名称 |
Method and system for testing RAM redundant integrated circuits |
| 摘要 |
System and method of testing a packaged random access memory (RAM) redundant integrated circuit die comprising: identifying a failed element in the redundant RAM of the packaged integrated circuit die; and replacing the failed element with a redundant element in the redundant RAM of the packaged integrated circuit die.
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| 申请公布号 |
US7284168(B2) |
申请公布日期 |
2007.10.16 |
| 申请号 |
US20050043377 |
申请日期 |
2005.01.26 |
| 申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
HILL J. MICHAEL;MELLINGER TODD;NEWSOME DAVID THOMAS |
| 分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
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