INTEGRATED CIRCUIT WITH A CAPACITOR BANK AND METHOD FOR TESTING A CAPACITOR BANK

摘要

An integrated circuit is provided which comprises a capacitor bank (CB) having a plurality of capacitors (C1-C6) and a switch (sw1-sw6) associated to each of the capacitors (C1-C6). The integrated circuit furthermore comprises a test circuit for testing the capacitor bank. The test circuit comprises a state machine unit (SM) for setting the switches (sw1-sw6) in the capacitor bank (CB). A current generator (Ic) is provided for generating a current to charge those capacitors (C1-C6) in the capacitor bank whose associated switches (sw1-sw6) have been set by the state machine unit (SMU). A comparator unit (CU) compares the voltages across the capacitors in the capacitor bank (CB) with a reference voltage (Vref). A counter (C) determines the time required by the current generator to charge the capacitors (C1-C6) to the reference voltage (Vref).