摘要 |
Techniques for performing IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory with a first, second and third sections, an encoder configured to process data in each of the first, second and third memory sections in a round robin fashion, an IFFT configured to process the encoded data in each of the first, second, and third sections in a round robin fashion, and a post-processor configured to process the IFFT processed data in each of the first, second and third memory sections in a round robin fashion. |
申请人 |
QUALCOMM INCORPORATED;SUBRAHMANYAM, JAI N.;GANAPATHY, CHINNAPPA K.;VAN VEEN, DURK L.;BAI, JINXIA;COUSINEAU, KEVIN STUART;OH, SEOKYONG |
发明人 |
SUBRAHMANYAM, JAI N.;GANAPATHY, CHINNAPPA K.;VAN VEEN, DURK L.;BAI, JINXIA;COUSINEAU, KEVIN STUART;OH, SEOKYONG |