Level shift circuit capable of preventing occurrence of malfunction when low power supply fluctuates, and semiconductor integrated circuit including the circuit

摘要

A level shift circuit includes two high-voltage PMOS, two high-voltage NMOS, and two low-voltage NMOS transistors. The first high-voltage PMOS is connected between a high voltage and a second output terminal, having a gate connected to a first output terminal. The second high-voltage PMOS is connected between the high voltage and the first terminal, having a gate connected to the second terminal. The first high-voltage NMOS is connected to the second terminal, having a gate through which a second signal is input. The first low-voltage NMOS is connected between the first high-voltage N-channel MOS and a ground, having a gate through which the second signal is input. The second high-voltage NMOS is connected to the first terminal, having a gate through which a first signal is input. The second low-voltage NMOS is connected between the second N-channel MOS and the ground, having a gate through which the first signal is input.