发明名称 Decision-feedback equalizer simulator
摘要 A Decision-Feedback Equalizer Simulator ("DFES") for predicting a bit-error rate ("BER") of a transmitted signal through a channel, wherein the transmitted signal includes a repeating pattern having a length of N bits and wherein the transmitted signal is sampled by a bit-error rate tester ("BERT") that produces a BER value as a function of a decision threshold nu of the BERT ("BERT(nu)"). The DFES may include a decision-feedback equalizer ("DFE") having a symbol detector, and a processor configured to define a vector of random variables ("<U STYLE="SINGLE">X") in response to determining the BER value, wherein <U STYLE="SINGLE">{right arrow over (X)} has the same length of N bits as the repeating pattern of the transmitted signal, and determine the BER value in the DFE as a function of a DFE decision threshold z ("BER(z)") of the symbol detector utilizing <U STYLE="SINGLE">{right arrow over (X)}.
申请公布号 US2007223571(A1) 申请公布日期 2007.09.27
申请号 US20060390617 申请日期 2006.03.27
申请人 VISS MARLIN E 发明人 VISS MARLIN E.
分类号 H03H7/30;H03D1/04 主分类号 H03H7/30
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