| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device for preventing the occurrence of an irregular clock with a high frequency upon switching clocks. <P>SOLUTION: The semiconductor integrated circuit device includes: a selection circuit 131 which is supplied with a first clock signal CLK1 and a second clock signal CLK2 whose phases are different from each other, a selection signal CKSEL, and a switching signal CKCHG1BH synchronized with an output clockϕOSC to be switched, selects the first clock or the second clock according to the selection signal and changes the selection of the first clock signal or the second clock signal according to the switching signal; and an output fixing circuit 132 which generates a pulse that becomes a high level or a low level until the clock outputted from the selection circuit falls and then rises or until the clock rises and then falls after a switch signal is switched from the switching signal synchronized with the output clock to be switched and a clock outputted from the selection circuit, to perform an OR operation on a clock and a pulse outputted from the selection circuit and to make the result an output clock. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
