| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device that reduces the gate tunnel leakage current and GIDL current of an on-chip memory mounted on SRAM and system LSI, a microprocessor, or a MOS transistor used for system LSI. <P>SOLUTION: The manufacturing method for the semiconductor device with N-channel type primary and secondary MIS transistors comprises a process to form a primary p-type well 210 that forms the primary MIS transistor and secondary p-type well 212 that forms the secondary MIS transistor, process to form a gate insulating film 221 and gate electrodes 230, 233 and 234 on the primary and secondary p-type wells, process to implant phosphor into the primary p-type well 210, process to implant arsenic into the secondary p-type well 212, process to form the sidewall film of the gate electrodes after the processes to implant phosphor and arsenic into the primary and secondary p-type wells respectively, and process to implant arsenic into the primary and secondary p-type wells 212 after the process to form the sidewall film of the gate electrodes. <P>COPYRIGHT: (C)2007,JPO&INPIT |
