发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a technique capable of improving reliability of a first MISFET and a second MISFET in a manufacturing technique of a semiconductor device where a gate electrode of the first MISFET and a gate electrode of the second MISFET are formed with a separate process. SOLUTION: On a semiconductor substrate 20, there is formed a laminate film comprised of a gate insulating film 26; a charge storage film 27; an insulating film 28; a polysilicon film 29; a silicon oxide film 30; a silicon nitride film 31; and a cap insulating film 32. Using a photolithography technique and an etching technique, there is eliminated a laminate film formed in a low withstand voltage MISFET formation region and a high withstand voltage MISFET formation region. Thereafter, gate insulating films 34, 36 and a polysilicon film 37 and a cap insulating film 38 are formed on the semiconductor substrate 20. After the gate electrode is formed in the low withstand voltage MISFET formation region and the high withstand voltage MISFET formation region, the gate electrode is formed in a memory cell formation region. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007234861(A) 申请公布日期 2007.09.13
申请号 JP20060054637 申请日期 2006.03.01
申请人 RENESAS TECHNOLOGY CORP 发明人 TANIGUCHI YASUHIRO;SHIBA KAZUYOSHI
分类号 H01L21/8234;H01L21/8247;H01L27/088;H01L27/10;H01L27/115;H01L29/423;H01L29/49;H01L29/788;H01L29/792 主分类号 H01L21/8234
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