| 摘要 |
A semiconductor system ( 100 ) enabled by an interposer ( 101 ) with non-reflow metal studs ( 251 ), preferably gold, coated with reflow metals ( 252 ), preferably solder. The studs are on exit ports ( 220, 230, etc) of the interposer surface; selected exit ports may be spaced apart by less than 125 mum center to center. A first electrical device ( 102 ), such as one or more semiconductor chips with contact pads matching the locations of the interposer exit ports, contacts the studs on one interposer surface. A second electrical device ( 104 ), such as a semiconductor chip, a passive component, or both, is attached to the other interposer surface. A carrier ( 106 ) supports the first device and provides electrical connections ( 109 ) to external parts.
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