| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a data processing apparatus which obviates reproduction of a system clock utilizing a PCR superimposed on a broadcasting signal and is configured by omitting a PLL circuit. <P>SOLUTION: A system clock at a fixed frequency is generated and in accordance with this system clock, decode processing of encoded video data is carried out. At this time, based on the amount of the encoded video data temporarily accumulated before demodulation processing, the output timing of a video signal to be demodulated is controlled. Thus, even without making a circuit system for demodulating the encoded video data operate by the system clock in synchronizism with a reference clock (PCR) transmitted from an encoding device side, a demodulation output timing of the encoded video data in synchronism with the PCR can be obtained and the PLL circuit for system clock generation synchronized with the PCR can be dispensed with. <P>COPYRIGHT: (C)2007,JPO&INPIT |
