发明名称 Stable PD-SOI devices and methods
摘要 One aspect of the present subject matter relates to a partially depleted silicon-on-insulator structure. The structure includes a well region formed above an oxide insulation layer. In various embodiments, the well region is a multilayer epitaxy that includes a silicon germanium (Si-Ge) layer. In various embodiments, the well region includes a number of recombination centers between the Si-Ge layer and the insulation layer. A source region, a drain region, a gate oxide layer, and a gate are formed. In various embodiments, the Si-Ge layer includes a number of recombination centers in the source/drain regions. In various embodiments, a metal silicide layer and a lateral metal Schottky layer are formed above the well region to contact the source region and the well region. Other aspects are provided herein.
申请公布号 US7268022(B2) 申请公布日期 2007.09.11
申请号 US20040925655 申请日期 2004.08.25
申请人 发明人
分类号 H01L21/00;H01L21/337;H01L21/84;H01L27/12;H01L29/45;H01L29/786;H01L29/80 主分类号 H01L21/00
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