| 摘要 |
<p>An address lock register managing address exclusive control is made to hold not only an address but also a request type, an access destination, and a cache block. Upon reception of a new request, firstly, the address lock register is referenced to judge whether an exclusive condition is satisfied, i.e., address match, CPU match, LINE match, or SX-WAY match is present and whether the address lock is busy according an output of an AND circuit. Moreover, upon reception of a response request, the address lock register is referenced to confirm that the addresses coincide, the response source coincides with the lock flag, and the new request causing the lock is matched with the response request to perform a correct response before releasing the lock.</p> |
