| 摘要 |
A memory device comprising one oscillator and a refresh control method are provided to minimize power consumption for a self refresh operation even when a plurality of processors shares one memory. In a memory device, n ports are connected to n processors, respectively. A refresh processing part(440) includes one oscillator, and performs a self refresh operation by using a control signal output from the oscillator after determining entry of a self refresh mode of the divided region corresponding to the combination of command signals input from the processor through a corresponding port. A storing region of the memory device is divided into k divided regions to correspond to the n processors.
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