发明名称 METHOD AND SYSTEM FOR IMPROVING THE MANUFACTURABILITY OF INTEGRATED CIRCUITS
摘要 <p>At a particular stage in design of an integrated circuit, DFM improvements are identified which might conflict with design requirements applicable during a subsequent stage in the design flow. These DFM improvements are“reserved”that is, they are not implemented right away. However, an instance of a DFM-optimized version of this portion of the design is generated, characterized and stored. Meta information is associated with the reserved DFM improvements, for example locations in the design which correspond to the reserved DFM improvements are tagged. If, after the subsequent stage in the design flow, processing of the meta-information (tags) shows that the reserved DFM improvement does not actually conflict with the potentially-conflicting design requirement, the corresponding reserved DFM improvement is implemented, for example, by swapping-in the stored instance of the DFM-optimized version of this portion of the design.</p>
申请公布号 EP1820130(A1) 申请公布日期 2007.08.22
申请号 EP20040804495 申请日期 2004.11.30
申请人 FREESCALE SEMICONDUCTOR INC. 发明人 RIVIERE-CAZEAUX, LIONEL
分类号 G06F17/50 主分类号 G06F17/50
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