| 摘要 |
<p>A method for manufacturing a MOSFET is provided to reduce the thickness of a poly silicon layer and to make a deep junction depth by depositing a gate electrode material on a gate oxide layer, depositing a dielectric for a hard mask on the gate electrode material, and performing a photo mask process. Gate oxidation is performed on an active region on a semiconductor substrate(100) to form a gate oxide layer(110). A gate electrode material(120) is deposited on the gate oxide layer. A dielectric for a hard mask is deposited on the gate electrode material and a photo mask process is performed. The dielectric is etched to form a hard mask(150). Junction implantation is performed to form an LDD(Lightly Doped Drain) junction layer. Highly doped impurity(n+/p+) is implanted to form a source/drain junction layer(180). A gate pattern is formed by using the hard mask. The gate electrode material is used with at least one selected from a polysilicon, an amorphous silicon, a doping silicon, and a silicide.</p> |
