发明名称 FREQUENCY DIVIDER
摘要 <P>PROBLEM TO BE SOLVED: To enable an n-division harmonic frequency divider (wherein, n is an integer of two or above) to be easily configured. <P>SOLUTION: The harmonic frequency divider 30 includes a harmonic mixer 32, a resonance circuit 34, and a buffer 36. The harmonic mixer 32 is equipped with a ternary multiplier 38 and a multiplier 40. The harmonic mixer 32 is composed of a single FET, and the FET functions as the multiplier 40. When output signals are input between the source and drain of the FET, a drain current becomes an odd function of a source-drain voltage due to nonlinearity, and the third harmonics occur. As the result, signals three times high in frequency can be obtained. When input signals are applied to the gate terminal of the FET, a result obtained by multiplying signals three times as high in frequency as output signals by input signals can be obtained in a drain current. As the result, the harmonic frequency divider 30 of simple configuration can be achieved. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007208589(A) 申请公布日期 2007.08.16
申请号 JP20060024149 申请日期 2006.02.01
申请人 UNIV OF TOKYO 发明人 FUJISHIMA MINORU
分类号 H03K21/00;H03K5/00;H03L7/183 主分类号 H03K21/00
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