| 摘要 |
The invention relates to a PMC memory circuit comprising a PMC memory cell having a PMC component, the PMC component having a solid electrolyte with permanently introduced defects, so that the PMC component has a hysteresis with regard to its I-V characteristic curve with an upper and a lower current value branch, and a data retention unit, which, for storing a state to be stored, applies to the PMC component a center voltage or storage voltage at which the PMC component is operated, either in the upper current value branch of the hysteresis for the purpose of storing a first state or in the lower current value branch of said hysteresis for the purpose of storing a second state.
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