发明名称 Semiconductor integrated circuit
摘要 This invention provides a technique for enhancing an operating frequency and improving reliability in a system using at least level sense type sequence circuits as a plurality of sequence circuits. A microcomputer includes a clock generator configured as a clock supply source, functional modules operated in sync with a clock signal, level sense type sequence circuits which are contained in the functional modules and configured as clock supply destinations, a clock supply system which propagates the clock signal to the level sense type sequence circuits, etc. The clock supply system includes a clock wiring which propagates the clock signal outputted from the clock generator to ends thereof via a plurality of branches. At least pulse generators are disposed in the midstream of the clock wiring. Each of the pulse generators varies timing provided to change the falling edge of the clock signal, which defines an endpoint of an input operating period of each level sense type sequence circuit.
申请公布号 US2007182475(A1) 申请公布日期 2007.08.09
申请号 US20060639141 申请日期 2006.12.15
申请人 RENESAS TECHNOLOGY CORP. 发明人 SHIMAZAKI YASUHISA
分类号 G06F1/04 主分类号 G06F1/04
代理机构 代理人
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